Over 24 hours on Berkeley Lab's Perlmutter supercomputer, Zhi Jackie Yao and Andy Nonaka pushed nearly every one of the system's 7,168 NVIDIA GPUs into modeling a 10-millimeter quantum chip at one-micron resolution — the first physical-electromagnetic simulation of microelectronic circuits at full system scale.

The team discretized the device into 11 billion grid cells, then executed over a million time steps in seven hours. Three circuit configurations evaluated in a single day. The chip itself was just 0.3 millimeters thick — a multilayer stack with features no bigger than a red blood cell.

"I'm not aware of anybody who's ever done physical modeling of microelectronic circuits at full Perlmutter system scale," Nonaka said. "We were using nearly 7,000 GPUs."

What's actually on the chip

The device came out of Irfan Siddiqi's Quantum Nanoelectronics Laboratory at UC Berkeley, jointly with Berkeley Lab's Advanced Quantum Testbed (AQT). Niobium wiring. Micron-scale resonators. A multilayer geometry that classical RF engineers sweat over — the same geometry that governs qubit performance at cryogenic temperatures.

"We care about what material you use on the chip, the layout of the chip, how you wire the metal — the niobium or other type of metal wires — how you build the resonators, what's the size, what's the shape, what material you use," Yao said. "We care about those physical details, and we include them in our model."

Most quantum-electromagnetic simulators treat the chip as a black box and infer behavior from boundary conditions. ARTEMIS, the team's tool of choice, keeps every physical variable in the loop — material, layout, wiring, resonator geometry.

Why the temperatures matter

Quantum chip design fuses microwave engineering with the quirks of physics at extremely low temperatures. Every geometric choice — a wire bend, a resonator gap, a layer thickness — ripples through qubit coupling, signal crosstalk, and resonator behavior. Most tools simplify. The Berkeley team keeps it all.

"The computational model predicts how design decisions affect electromagnetic wave propagation in the chip," Nonaka said, "to make sure proper signal coupling occurs and avoid unwanted crosstalk."

How the run worked

ARTEMIS is an exascale electromagnetic solver originally developed under the DOE's Exascale Computing Project. It solves Maxwell's equations in the time domain, capturing nonlinear effects that frequency-domain tools routinely miss.

"The combination is instrumental, because we use the partial differential equation, Maxwell's equation, and we do it in the time domain so we can incorporate nonlinear behavior," Yao said. "All this adds up to give us one-of-a-kind capability."

Compute came through NERSC's Quantum Information Science @ Perlmutter program, which allocates node-hours to quantum research. This allocation consumed nearly the entire machine.

"This effort stands out as one of the most ambitious quantum projects on Perlmutter to date, using ARTEMIS and NERSC's computing capabilities to capture quantum hardware detail over more than four orders of magnitude," said Katie Klymko, a NERSC quantum computing engineer on the project.

Yao will present the work in a technical demonstration at SC25.

What the simulation catches

Quantum chips fail in ways classical RF designers don't always anticipate. Stray crosstalk between neighboring qubits. Mismatched resonators. Signal coupling that looks clean in schematic but degrades the moment the device sits at cryogenic temperatures.

The old workflow: simulate behavior, hope the geometry holds. The Berkeley approach: simulate geometry, predict behavior, then compare against measured hardware once AQT fabricates and cools the chip. That last step — model-versus-measurement — turns an HPC stunt into a design tool.

What comes next

Yao and Nonaka want quantitative spectral analysis next — checking how each qubit resonates with the rest of the circuit, then benchmarking those numbers against independent frequency-domain solvers for confidence.

"We'd like to do a more quantitative simulation so that we can do a post-process and quantify the spectral behavior of the system," Yao said.

Once that comparison lands, ARTEMIS graduates from research curiosity to a tool that quantum hardware teams can run before they cut metal. That's a meaningful shift for an industry that has burned countless fabrication cycles on chips that looked fine in simulation but failed when cooled to operating temperatures.

"More powerful, more performant quantum chips will unlock new capabilities for researchers and open up new avenues in science," said Bert de Jong, QSA director.

The broader question is whether exascale electromagnetic simulation moves from one-off Perlmutter runs into a regular pre-tape-out workflow at the major quantum foundries. For now, 7,168 GPUs, 11 billion cells, and one-micron resolution remain a record — and a sign that quantum hardware design is borrowing the HPC playbook to catch problems before silicon gets cold.