Chip Manufacturing

ITRI Unveils Array-Based 3D Inspection Tech for Taiwan Chips

ITRI has developed array-based 3D inspection technology to strengthen Taiwan's advanced semiconductor inspection, targeting defects that 2D tools cannot see in stacked and high-aspect-ratio structures.

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Rebecca Stone
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Taiwan's Industrial Technology Research Institute (ITRI) has developed an array-based 3D inspection technology aimed at strengthening the island's capabilities in advanced semiconductor inspection, the institute announced.

The announcement lands at a moment when inspection and metrology have become chokepoints in advanced manufacturing. As logic devices shrink and 3D structures stack higher, conventional 2D optical inspection struggles to catch defects hidden on sidewalls, under structures, or inside high-aspect-ratio features. ITRI's answer is an array-based approach: many sensing elements working together to reconstruct three-dimensional surface profiles rather than flat images.

That matters commercially. Taiwan already hosts the world's most concentrated advanced logic capacity, and the tools that verify what a fab actually builds — inspection and metrology equipment — remain dominated by a small number of foreign suppliers. A domestically developed 3D inspection capability gives Taiwanese chipmakers and equipment makers another option, and gives the island's toolmakers a foothold in a segment where local content has historically been thin.

What does array-based 3D inspection actually do?

Traditional inspection systems capture two-dimensional images of a wafer and flag contrast anomalies as potential defects. The method works until geometry goes vertical. FinFETs, through-silicon vias, and advanced packaging interconnects all hide critical dimensions from a top-down view.

Array-based 3D inspection attacks the problem from multiple angles at once. By arranging sensors in an array, the system gathers enough parallax and height data to reconstruct a true 3D profile of the structures it scans. That reconstruction lets engineers measure height, depth, and sidewall geometry directly — the parameters that determine whether a via connects, a bond holds, or a die seals properly.

According to ITRI, the technology strengthens Taiwan's advanced semiconductor inspection capabilities, positioning local industry to support tightening process-control demands at advanced nodes and in advanced packaging, where 3D verification has moved from nice-to-have to mandatory.

Why inspection is the quiet battleground

Process control equipment rarely grabs headlines the way lithography does. But as feature sizes fall, the economics of yield shift toward finding defects earlier. A void buried in a bonding interface or a subtle height variation across a wafer can scrap an entire package that took dozens of process steps to build.

For Taiwan, the stakes are strategic as well as commercial. The island's semiconductor ecosystem has spent years pushing to deepen the local equipment and materials supply chain, reducing reliance on imports for critical manufacturing steps. Inspection sits squarely in that effort. A domestic array-based 3D inspection technology, developed by ITRI — the state-backed research organization that has seeded many of Taiwan's industrial technology transitions — extends local capability into one of the most technically demanding corners of the toolchain.

Advanced packaging sharpens the need further. Chiplets, fan-out substrates, and stacked memory all demand 3D measurement at bonding and assembly stages where a single hidden defect can kill a multi-die module worth far more than any individual die.

What comes next

ITRI's announcement describes the technology as a strengthening of Taiwan's inspection capabilities rather than a shipped product with named customers, so the near-term question is transfer: which equipment makers or fabs will adopt the array-based approach, and at what process nodes. If the institute's record of moving research into commercial partners holds, array-based 3D inspection could give Taiwanese toolmakers a sharper competitive edge as 3D verification demand climbs.

Source: Google News: semiconductors

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Rebecca Stone

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Correspondent covering technology and product news in Semiconductors, chip manufacturing, hardware, AI compute at Chip Dispatch.

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