Microchip has repackaged its mSiC 1200-V silicon-carbide MOSFET family into the top-side cooled QDPAK surface-mount package, adding a new thermal option for high-power industrial and automotive designs.

The family spans on-resistance values from 20 mΩ to 80 mΩ RDS(on). Every device shares the same QDPAK footprint. That footprint parity lets engineers scale power levels and tune efficiency without a PCB redesign, Microchip said.

What does top-side cooling change?

Most power packages push the bulk of their heat into the printed circuit board. The QDPAK inverts this. It gives the die a shorter, more direct thermal path from the device to an external heatsink mounted above the package.

Microchip claims two consequences. First, the PCB carries less thermal stress because less heat flows through its copper. Second, the same board area can support higher power density, since heat leaves through the top rather than through the substrate.

The claim is standard for top-side cooled packages across the industry. What Microchip has not published here is a junction-to-heatsink thermal resistance figure, so buyers cannot yet compare the QDPAK's thermal performance against competing top-cooled formats on numbers alone.

Does the package help switching?

Microchip said the QDPAK also minimizes parasitic inductance. Lower loop inductance reduces voltage overshoot and switching losses in fast SiC circuits, which improves switching performance and overall system efficiency.

Again, the announcement gives no inductance value. Designers will need SPICE models and bench measurements before they can verify the efficiency gain in their own topologies.

Which markets is Microchip targeting?

The target applications are high-power industrial and automotive systems. Typical use cases for 1200-V SiC at these resistance grades include motor drives, solar inverters, DC fast chargers and traction inverters.

The family ships in two qualification grades:

• Industrial-grade versions for factory automation and energy infrastructure
• Automotive-qualified versions certified to AEC-Q101

The AEC-Q101 option matters commercially. It lets automotive designers source the same silicon and package already validated for industrial use, rather than qualifying two separate parts.

What is the strategy behind one footprint?

The single-footprint approach across 20 mΩ to 80 mΩ is the sharpest commercial point in the release. A designer can prototype with an 80 mΩ device, then drop in a 20 mΩ part for higher current without respinning the board. Microchip frames this as simplifying development and accelerating time to market.

That benefit holds only within this one package, however. Moving between QDPAK and Microchip's other mSiC packages, or to a competitor's topology, still requires a redesign.

The release also leaves pricing, availability dates and volume tiers unstated. Microchip has not said when production quantities will ship, so schedule risk remains for programs planning designs around the part.

For now, the announcement extends Microchip's SiC portfolio rather than breaking new ground in silicon carbide itself; the competitive test will be whether the QDPAK's thermal numbers, once published, beat rival top-cooled packages on price per watt delivered.