NASA's next-generation spaceflight processor has reached roughly 500 times the performance of the radiation-hardened chips flying in current spacecraft, according to early test results from the agency's Jet Propulsion Laboratory. The system-on-a-chip, developed jointly by JPL and Microchip Technology, is designed to deliver up to 100 times the computing power of today's spaceflight computers while surviving radiation, temperature swings, and the shock of planetary landings.

Testing began at JPL in Southern California in February and is expected to continue for several months. NASA says the processor is functioning as intended, and the early numbers exceed the project's own baseline target by a factor of five.

The device sits at the center of NASA's High Performance Spaceflight Computing project, run under the Game Changing Development program at Langley Research Center in Hampton, Virginia. The agency selected Microchip, based in Chandler, Arizona, as its partner in 2022, and the company funded its own research and development work on the processor.

Why does performance matter in space?

Spacecraft today fly with old processors for one reason: durability. Current chips are dependable enough to survive the extreme conditions beyond Earth's atmosphere, but they lack the performance that advanced missions demand. Newer, far more capable processors are essential for autonomous spacecraft, faster onboard scientific analysis, and support for crews heading to the Moon and Mars.

The mechanism is straightforward. High-energy particles from the Sun and deep space can trigger computer errors that force a spacecraft into "safe mode," shutting down nonessential systems until engineers on the ground fix the problem. A fault-tolerant, high-throughput processor can absorb those hits and keep working.

"Building on the legacy of previous space processors, this new multicore system is fault-tolerant, flexible, and extremely high-performing," said Eugene Schwanbeck, program element manager in NASA's Game Changing Development program at Langley. "NASA's commitment to advancing spaceflight computing is a triumph of technical achievement and collaboration."

The takeaway: radiation tolerance and raw performance have historically traded off against each other, and this project aims to break that trade-off.

What is the chip, and how is it tested?

The device is a system-on-a-chip, or SoC, meaning it packs the essential components of a computer into a single compact unit. It integrates central processing units, computational offload engines, advanced networking, memory, and input/output interfaces. The design follows the same logic as SoCs in smartphones and tablets: compact and energy efficient. The difference is longevity — NASA's version must run for years in deep space, potentially billions of miles from Earth, with no maintenance or repairs.

JPL engineers are qualifying the part through radiation, thermal, and shock testing alongside a rigorous functional test campaign.

"We are putting these new chips through the wringer by carrying out radiation, thermal, and shock tests while also evaluating their performance through a rigorous functional test campaign," said Jim Butler, High Performance Space Computing project manager at JPL.

The team is also simulating planetary landings, using high-fidelity landing scenarios drawn from real NASA missions that would normally require power-intensive hardware to process large volumes of landing-sensor data.

"This is an exciting time for us to be working on hardware that will enable NASA's next giant leaps," Butler said.

The team marked the start of testing with an email titled "Hello Universe," a nod to the introductory messages of early computer programming.

In short, the chip must prove it can compute hard and survive hard at the same time.

Where will the processor end up?

Once certified for spaceflight, NASA plans to integrate the processor into a wide range of missions:

• Earth orbiters
• Planetary rovers
• Deep space probes
• Crewed habitats

The commercial picture extends beyond NASA. Microchip has already shared sample chips with defense and commercial aerospace partners, and the company plans to adapt the processor for aviation and automotive manufacturing on Earth.

The strongest near-term pull is autonomy. With onboard artificial intelligence, a spacecraft could respond to unexpected situations in real time when communication delays make human control impractical — a hard limit for missions to Mars and beyond. The chip could also help deep space missions process, store, and transmit large volumes of scientific data more efficiently.

The takeaway: one radiation-hardened design now serves a space agency, defense buyers, and commercial aerospace customers at once.

What happens next?

Testing at JPL continues for several more months before flight certification. The GCD program and JPL, which Caltech manages in Pasadena, oversaw development from mission planning and industry studies through final delivery.

If the remaining tests hold to the early results, spacecraft flying later this decade will carry a computer hundreds of times faster than anything in the current fleet — and Microchip will carry a space-qualified SoC architecture into aviation and automotive markets where radiation tolerance is a differentiator.