
Nvidia Sales 'Off the Charts' as Hyperscalers Add Custom AI Chips
Nvidia's data-center revenue runs 'off the charts' per CNBC. Google, Amazon, Microsoft, and Meta now deploy custom AI silicon targeting inference, training, and recommendation workloads across their data centers.
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- Grace Kim
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What is driving Nvidia's record AI chip sales?
Nvidia's data-center revenue is running "off the charts," according to CNBC reporting. The chipmaker's accelerators remain the default choice for large-language-model training at major cloud operators. Hyperscalers absorb multi-quarter lead times on flagship GPUs as production capacity lags bookings. Customers accept partial allocations and premium pricing rather than pursue alternatives in the open market.
The Nvidia revenue trajectory has set successive quarterly records through the current AI buildout cycle. Demand outstrips supply for the company's H100 and Blackwell-generation products across global data-center markets. Pricing per accelerator unit has held firm despite volume allocations at the largest cloud customers.
Which companies now build their own AI chips?
Google, Amazon, and other hyperscale operators now design AI accelerators in-house, the CNBC report states.
- Google: Tensor Processing Units serve internal and cloud AI workloads
- Amazon: Trainium and Inferentia chips power AWS AI services
- Microsoft: Maia accelerator supports Azure AI infrastructure
- Meta: MTIA silicon serves recommendation and generative-AI workloads
This cohort of in-house programs continues to expand each fiscal year as chip-design capability spreads beyond traditional accelerator vendors.
The custom-silicon push targets inference and specialized training rather than Nvidia's broad training franchise. Hyperscalers aim to reduce per-token cost and secure supply against future allocation cycles. They seek independence from a single accelerator vendor at a time of sustained demand pressure.
How does custom silicon affect Nvidia's market position?
Nvidia retains the dominant share of training demand through its installed base and software ecosystem. The CUDA platform anchors developer workflows across the industry and across model architectures. Annual architecture updates extend the hardware lead over alternative designs in raw throughput per accelerator.
The custom-chip programs reduce Nvidia's share of incremental accelerator demand at large customers over time. The shift concentrates at the inference layer, where workload volumes scale sharply across deployed applications. Training demand remains heavily weighted toward Nvidia's general-purpose GPUs across the AI industry as a whole.
What role does Nvidia's software stack play?
Nvidia's CUDA software platform remains the deepest moat in the AI accelerator market today. Developers build training pipelines around CUDA libraries, kernel extensions, and profiler tools. Porting to alternative architectures requires significant engineering effort and validation cycles. Hyperscaler custom-chip teams must compete against this incumbent software advantage even when silicon performance matches or exceeds Nvidia's published specifications.
How do hyperscaler chips differ from Nvidia's GPUs?
Custom accelerators sacrifice generality for workload-specific efficiency in silicon design. Google TPUs optimize for matrix-heavy operations used in transformer training and inference. AWS Trainium targets cost-per-token economics for production AI workloads at cloud scale. Meta MTIA balances recommendation-system throughput with emerging generative-AI demands across the company's platforms.
The narrower design envelope lets custom chips outperform Nvidia on per-watt and per-dollar metrics within their target workloads. Nvidia's general-purpose GPUs retain advantage on model flexibility, multi-tenant deployment, and ecosystem tooling.
Where does the silicon come from?
Taiwan Semiconductor Manufacturing Co. fabricates Nvidia's flagship data-center GPUs and Google's Tensor Processing Units on advanced process nodes. AWS Trainium and Inferentia parts split between TSMC and Intel Foundry Services depending on generation and product family. Meta's MTIA chips rely on TSMC's N5 and N4 process nodes for current production.
Advanced packaging capacity at TSMC's CoWoS lines remains the binding constraint on accelerator shipment volumes across the industry. The same packaging bottleneck affects custom-silicon output from hyperscaler partners and from Nvidia itself. CoWoS allocation now functions as a strategic currency across the AI supply chain, with hyperscalers and Nvidia negotiating alongside each other for limited capacity.
What shifts in the AI accelerator market ahead?
Analysts expect the in-house silicon share of hyperscaler budgets to climb through 2026 and beyond. Nvidia's roadmap of next-generation GPU architectures will set the competitive ceiling for custom-silicon alternatives in the same period. The training-versus-inference split will determine silicon purchasing patterns across major cloud operators and enterprise buyers.
Nvidia's pricing flexibility and allocation strategy will shape hyperscaler incentives through the next product cycle. Customers with mature in-house silicon programs may redirect training budgets toward custom designs as compiler maturity improves. The competitive picture turns on workload mix and software portability rather than raw silicon performance alone, given the entrenched CUDA base across model developers.
Source: Google News: AI chips
More from Grace Kim
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Market editor covering people, launches and day-to-day practice in Semiconductors, chip manufacturing, hardware, AI compute at Chip Dispatch.
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