Qualcomm Validates HBC Silicon: 18x LPDDR Bandwidth Claim

Qualcomm says its first-generation high-bandwidth computing (HBC) silicon delivers 18 times the memory bandwidth of LPDDR and five times the terabit-per-second-per-watt energy efficiency of HBM4. The company validated the complete memory read-write path and near-memory computations at production levels using industry-standard automated test equipment. Those numbers are Qualcomm's own lab measurements. No third-party verification exists yet.

Qualcomm introduced the HBC architecture in July as its answer to the memory wall. The problem is simple. AI inference performance now depends less on raw compute and more on how fast a processor feeds data to its calculation units. The issue hits both model performance and the cost of running AI workloads, a cost that grows sharper as agentic AI workloads multiply.

What are the three strategies for the memory wall?

Two approaches dominate today. One places the AI model in fast on-chip memory. The other stacks high-bandwidth memory (HBM) around a processor. Qualcomm argues for a third: move the compute next to the memory.

"In traditional computer architecture, you usually have DDR, you have memory of package, you have usually plenty of capacity on that, but you have a narrow link, which moves the data very slowly," said Gerardo Giaretta, vice president and general manager of datacenter CPU and AI at Qualcomm. HBM widens that link, but he counts the costs: the premium on HBM price, its power consumption, and the complex interposer and 2.5D co-packaged packaging it demands.

How does HBC work in practice?

The first-generation design stacks LPDDR memory on top of a full AI accelerator die. Most AI workload operations run inside that package. Some operations may shift to the central system-on-chip, the Dragonfly AI250, depending on implementation. But most processing stays under the memory stack.

The physics argument is distance. "You're not moving data across millimeters, but you're moving data or across micrometers," Giaretta said. Shorter paths mean lower energy and better efficiency, according to Qualcomm's framing.

There is a catch in the design. The interface between the AI250 and LPDDR is slower than HBC. Giaretta frames the HBC package as a co-processor: once instructed, most decode operations run inside HBC, and only results travel back over the slower link. "You don't have to send the data, you just have to send the results," he said. The claim rests on workload partitioning working as described in production systems. That remains unproven outside the lab.

What does the roadmap promise?

Qualcomm has started production of the AI250 inference platform, due for release next year. The AI250 itself is expected to start sampling in the first half of 2027. HBC will be integrated into the AI250 to form what executives call a full AI inference accelerator platform, foundational to the Dragonfly Rack, the vendor's full-stack inference infrastructure.

The HBC validation marks the first step of a multi-year roadmap:

• Dragonfly AI250 sampling: first half of 2027
• Dragonfly C1000 CPU sampling: 2027
• Dragonfly AI300 samples: 2028

Note the timeline gap. The platform is due for release next year, but AI250 sampling starts in 2027. Qualcomm did not reconcile those dates in the announcement.

Why the unusual publicity for a chip bring-up?

Giaretta acknowledged the oddity directly. "This is the first time that somebody has done something like this. We usually don't do a blog or a pre-briefing and so forth for a bring-up of a chip. We do gazillions of chips in Qualcomm and we don't do that," he said. The public validation, he argued, de-risks the promise of high-yield AI250 manufacturing next year.

He also called HBC "a clear differentiator of our solution versus others." Qualcomm has spent more than a year positioning itself as an Nvidia alternative in the AI datacenter. The company is working with partners on other uses for HBC beyond the AI250, though it named none.

The competitive test arrives in 2027. That is when AI250 samples reach customers who can measure Qualcomm's 18x bandwidth claim against HBM-based rivals in real inference workloads.