TSMC is pushing to build five more advanced packaging plants in southern Taiwan, according to a report from South Korean broadcaster SBS. The plan marks one of the contract manufacturer's most aggressive expansions of back-end capacity to date, and it targets the single tightest link in the AI semiconductor supply chain: packaging.

The new plants would join TSMC's existing advanced packaging operations, which include its CoWoS (Chip-on-Wafer-on-Substrate) line at the Chiayi and Tainan science parks in southern Taiwan. CoWoS stacks logic dies and high-bandwidth memory side by side on an interposer, and it is the packaging format behind the accelerators that Nvidia, AMD and several hyperscaler in-house chip programs depend on. Demand for that capacity has outstripped supply since 2023, and TSMC has repeatedly said expanding CoWoS output is a priority.

The five-facility push, as reported by SBS, signals that TSMC now expects tightness in advanced packaging to persist long enough to justify dedicated new sites rather than incremental tool additions inside existing fabs. Southern Taiwan already anchors much of the company's leading-edge manufacturing: Tainan hosts the bulk of 3-nanometer production, and the nearby Kaohsiung and Chiayi sites are slated for next-generation capacity, including 2-nanometer volume manufacturing.

Locating the packaging plants in the same region carries commercial weight. Advanced packaging is labor- and substrate-intensive, and co-locating it with front-end wafer fabrication shortens the loop between finished wafers and shipped modules. That matters because packaging, not lithography, has been the rate limiter on how quickly AI accelerator makers can actually deliver product to cloud customers. Nvidia's server GPU backlog, for example, has been constrained at times more by CoWoS slot availability than by wafer supply.

The expansion also sharpens competitive pressure on the packaging specialist ecosystem. OSAT players such as ASE Technology and Amkor, along with Intel with its Foveros and EMIB technologies and Samsung with its own packaging road map, are all chasing the same AI-driven demand for 2.5D and 3D integration. Every additional CoWoS-class line TSMC brings up in-house captures margin and scheduling control that would otherwise sit with external packaging partners, and it gives TSMC more leverage over how allocation is divided among its largest customers.

For South Korean media covering the story, the subtext is Samsung. The Seoul conglomerate has struggled to qualify its foundry and packaging stack for Nvidia's high-end accelerators, and a TSMC build-out of this scale widens the gap in the segment where capacity, not design wins alone, determines who ships product.

The report did not specify investment amounts, construction timelines, or capacity targets for the five planned plants, and TSMC has not yet published those figures itself. Any per-fab investment would likely run into the billions of dollars: TSMC disclosed last year that it would spend about NT$77 billion (roughly US$2.4 billion) on a pair of advanced packaging facilities in Chiayi alone, a data point that suggests the five-site program, if executed in full, represents a multi-billion-dollar commitment to back-end capacity.

Geopolitics frames the decision as much as demand does. Taiwan's government has been encouraging investment in the island's southern counties, and TSMC's domestic build-out continues even as it commissions fabs in Arizona, Kumamoto and Dresden, keeping the most advanced — and most capacity-constrained — packaging technology concentrated at home.

If the five plants come online on the timelines AI customers are hoping for, CoWoS allocation pressure could begin easing in the second half of the decade, rebalancing pricing power that has sat squarely with whoever controls back-end capacity.

(Note: the underlying SBS report consists of the headline announcement; figures such as the Chiayi investment cited above come from TSMC's prior public disclosures and are included for context.)