A Decade In, zeroRISC Sees A Bright Future For Open Silicon

Semiconductors

zeroRISC Bets a Decade of OpenTitan Work on Open Silicon Trust

OpenTitan has moved from a 2018 Google project to shipped silicon from Nuvoton, a Caliptra datacenter release, and the Pavona standards body led by zeroRISC CEO Dominic Rizzo.

By
Grace Kim
Filed
Channel
Semiconductors
Read
4 min read

By Grace Kim, Chip Dispatch

OpenTitan, the open source silicon root of trust that Google first detailed at Hot Chips in 2018, has grown into a commercial product line that now anchors a startup and a new standards body. Nuvoton shipped a discrete OpenTitan-based RoT chip in 2024, with Google planning to use it in Chromebooks running ChromeOS. In 2025, the first release of Caliptra — a RoT architecture built on OpenTitan elements by Microsoft, Google, AMD, and Nvidia through the CHIPS Alliance and Open Compute Project — arrived for datacenter SoCs.

Dominic Rizzo led the OpenTitan effort inside Google for five years and served as its technical lead manager. He left Google in 2023, co-founded zeroRISC that year, and now serves as CEO. He remains project director for OpenTitan at lowRISC, the official maintainer and host of the project.

"The way I sold OpenTitan inside Google was they were buying a lot of heterogeneous hardware for the cloud and it made their security posture a little lumpy," Rizzo told The Next Platform. "OpenTitan was really the first truly credible, well-resourced, do-it-right-from-scratch open source silicon project."

What is Pavona?

In May, zeroRISC joined Qualcomm, Analog Devices, Meta, and the Max Planck Institute for Security and Privacy to launch Pavona under GlobalPlatform, a nonprofit standards consortium. Rizzo chairs the effort. Pavona is a neutral ecosystem for designing open and secure hardware, modeled on how the Yocto Project and Zephyr Project operate for software.

The project ships a production-stage post-quantum cryptography stack supporting ML-KEM, ML-DSA, and SLH-DSA. It also provides a composable platform that organizations can use to build hardware roots of trust and chip subsystems.

Why did open silicon take so long?

Open source silicon ideas surfaced alongside Linux, but never gained momentum. Rizzo attributes the delay to inconsistent interfaces, inconsistent standards, and deep specialization among silicon engineers.

"There's a backend production person, there's a layout person, there's an analog person, there's a digital designer, there is a DV person. It's not like software," he said. "There's also a lot fewer people who do it than do software."

lowRISC argues the industry has since changed. In a statement earlier this year, the company noted that the vast majority of chip designs now adopt third-party IP from vendors like Arm and Synopsys and foundries like TSMC. "It is only a small step for silicon vendors to start using open-source IP instead of that from commercial vendors," the company wrote.

RISC-V, introduced in 2010 and broadly adopted in embedded systems, also lowered the barrier. "If you've got an open source ISA, why not open source implementation? That's a natural next step," Rizzo said. lowRISC's Ibex CPU, released in 2019, now appears in various SoC designs.

What does zeroRISC sell?

The company offers what it calls a silicon trust stack. It includes:

  • A Pavona repository and collaboration layer with version control, review workflows, and build artifacts
  • Continuous integration with verification workloads running on physical hardware
  • Post-quantum-ready silicon IP
  • A provisioning service with a datacenter line-side server backed by a hardware security module
  • A management service for OEM debugging and over-the-air updates

In May, zeroRISC released its cryptographic hardware and software stack as open source. The stack includes a configurable Cryptolib embedded library with a programmable asymmetric cryptography coprocessor for post-quantum and classical algorithms, plus dedicated accelerators for AES and SHA2/3.

How urgent is post-quantum cryptography?

The U.S. government and counterparts in Europe have set aggressive deadlines for post-quantum migration. Quantum systems are expected to decrypt data protected by AES-256 and similar techniques, enabling "harvest now, decrypt later" attacks on already-stolen data. Google places that risk as early as 2029. Others point to 2030 or later.

"PQ cryptography, it's a bit more of a pain to implement than the classical cryptography," Rizzo said. "The trade-offs are a lot more varied and the underlying hard problems are different."

New regulation adds pressure. The European Union's Cyber Resilience Act shifts liability for cyber incidents onto device makers, forcing deeper scrutiny of supply chains. "You need to have a hardware root of trust below the software that you can reset back to a known good state or all hope is lost," Rizzo said.

Governance remains the open question for Pavona. "We can build the technology in the open. It's more like, how do you sustain it for the long term?" Rizzo said. The project will focus next on infrastructure, configurability, and flexibility, with the aim of making open silicon viable for organizations beyond a single primary supporter.

Original: globalplatform.org

Share this article:

More from Grace Kim

Grace Kim

Show full bio

Market editor covering people, launches and day-to-day practice in Semiconductors, chip manufacturing, hardware, AI compute at Chip Dispatch.

533 articles

Related articles

« Previous articleNext article »