The Globe and Mail frames the trend directly: "As Big Tech Designs Its Own AI Chips, the Companies Behind the Scenes Win." Big Tech now designs its own AI accelerators, and the firms helping to deliver those programs are the ones writing the revenue.

What does the trend look like in practice?

The shift is more nuanced than the headline suggests. When a hyperscaler takes AI silicon in-house, the engineering work does not vanish. It moves into long-running partnerships with chip design services firms, EDA vendors, IP licensors, and the foundries that produce the dies. The customer owns the architecture. The partner owns the tape-out.

Why do hyperscalers still need outside help?

Three reasons keep the design partners in the picture. The partners carry proven IP blocks, including memory controllers, interconnect fabrics, and advanced packaging expertise. Familiarity with the customer's roadmap shortens development schedules. And capacity reservations at leading-edge nodes translate design wins into predictable wafer revenue. Rebuilding that capability in-house would cost more than keeping the bill.

What does this mean for the merchant GPU vendors?

Less disruption than the custom-silicon headlines suggest. Hyperscalers continue to ship general-purpose GPUs alongside their custom parts, much as a fleet operator runs both petrol and electric vehicles. The two coexist in most training and inference fleets, with each addressing workloads where its economics matter most. Merchant accelerator revenue continues to set records. The custom-silicon partners grow alongside them.

Forward look

The Globe and Mail framing points to a sustained transfer of value to the design partners through the current AI build-out. If hyperscalers continue to commit to custom silicon at the pace the trend implies, the engineering firms behind those accelerators remain positioned to be the quiet winners.