Six of the industry's biggest spenders — AMD, Broadcom, Meta Platforms, Microsoft, Nvidia and OpenAI — locked the architecture for co-packaged optics scale-up networks this spring, and their OCI GEN1 spec already delivers 200 Gb/sec per direction per fiber across four wavelengths at 50 Gb/sec each, with a roadmap to 1.6 Tb/sec.

That consortium settled the architectural argument over AI networking. What it didn't settle is manufacturing. The spec defines the first step and leaves the harder question open: how bandwidth keeps scaling, and which production approach delivers the wavelengths beyond four.

Matt Crowley, chief executive officer of Scintil Photonics, argues the constraint is now purely on the supply side. "The OCI MSA settled the architecture. The path to ship it runs through heterogeneous integration," he wrote.

Why slow-and-wide won

The founding members converged on low symbol rates with NRZ modulation paired with wavelength-division multiplexing. The math favors it. NRZ carries one bit per symbol, while PAM-4 carries two but needs roughly three times the optical power for the same bit-error rate. SerDes power per bit at 50 GBaud runs about one-third that of 100 GBaud. FEC stays light. Latency stays tight.

Wavelength multiplication preserves that regime. Symbol-rate escalation walks the architecture back out of it.

First-movers already chose the path. Ayar Labs has pursued eight-to-16 wavelength designs for years. Nvidia's published roadmap, "A Roadmap Toward Sub-1 pJ/bit Optical Interconnect," models 16 wavelengths as the route to the MSA's energy targets.

What does the wavelength staircase cost?

Each step up keeps per-channel electronics unchanged. Eight wavelengths deliver 400 Gbps per fiber per direction; 16 deliver 800. Doubling wavelengths doubles bandwidth without doubling design cost. Multiplexing at the laser source keeps fiber count flat as channels multiply.

The payoff is cluster size, not raw throughput. Larger, low-latency scale-up domains enlarge working memory, extend context windows and add transformer layers — which means deeper reasoning, fewer network stalls and higher GPU utilization. Today's wavelength decision, Crowley writes, sets the ceiling on which models a cluster can run in 2028 and beyond.

That gives architects a sixth metric alongside energy per bit, latency, per-fiber throughput and reach: wavelength-scaling headroom on the same manufacturing flow. Where a supplier's light source can't extend to 16 wavelengths without re-engineering, "the redesign is already on the calendar, with a two-year delta baked in."

Why discrete lasers hit a wall

Two structural paths share the same failure mode. The shared-laser path combines lasers through combiner-and-splitter networks, but splitting losses scale with channel count; drive currents climb and reliability margins erode at every step. Economics that work at four wavelengths don't extend to eight, let alone 16.

The dedicated-laser path scales linearly with channels. A single module supplying 16 wavelengths across eight fibers means roughly 128 lasers, 128 fiber alignments and 128 monitoring photodiodes — each holding micrometer tolerances across temperature swings and years of field life.

Volume is the binding constraint. Hyperscale CPO needs millions of laser source units per month, not tens of thousands. Discrete-laser approaches don't reach those volumes on either path, and this — not the architecture debate — is what has kept DWDM from deploying at scale.

The CMOS pattern, repeated in photonics

Photonic integration has moved through three manufacturing eras: discrete optical assembly with hand-aligned parts and flat-or-worse cost curves; silicon photonics, which put modulators, waveguides and photodetectors on monolithic wafers but excluded lasers, semiconductor optical amplifiers and high-speed modulators; and now heterogeneous integration, which brings III-V gain material onto the same wafer as silicon photonics.

Scintil's SHIP — Scintil Heterogeneous Integrated Photonics — runs on Tower Semiconductor's silicon photonics platform on 200 mm production lines today, the same lines shipping tens of millions of pluggable transceivers. A 300 mm path is next. At OFC 2026, four architecturally distinct system vendors independently requested SHIP extensions, all needing the same thing: III-V integration for optical amplifiers and high-speed modulators that pure silicon can't deliver.

The production proof is LEAF Light, a single-chip DWDM-native light engine demonstrated in eight- and 16-wavelength configurations compatible with microring-based CPO transceivers, built on established production lines. Scintil's Series B included participation from Nvidia.

Two generations out, Crowley writes, the interconnect stops being an assembly problem and becomes a process node problem — and the teams that defer the manufacturing question will spend two generations rebuilding programs around suppliers who solved it earlier.