Semiconductors

M31 and Ambiq Build Low-Power Foundation IP for TSMC N12e

M31 and Ambiq have co-developed low-power foundation IP for TSMC's N12e process, pairing M31's library portfolio with Ambiq's ultra-low-power circuit techniques for battery-driven edge SoCs.

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Nathan Brooks
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M31 Technology and Ambiq have jointly developed low-power foundation IP for TSMC's N12e process, according to an EE Times Asia report. The collaboration pairs M31's foundation IP portfolio with Ambiq's ultra-low-power circuit design expertise on a node TSMC positions for cost-sensitive, power-constrained applications.

The headline fact is the node itself. TSMC's N12e — the enhanced variant of its 12nm-class offering — sits in a strategic band of the foundry's portfolio: mature enough to keep wafer costs well below leading-edge nodes, advanced enough to support the transistor-level optimizations that low-power designers demand. Foundation IP on that node — standard cells, memory compilers, and related building blocks — determines how efficiently customers can exploit it.

Foundation IP rarely makes headlines, but it sets the floor for every chip taped out on a process. Poorly characterized libraries leave performance and leakage on the table; well-optimized ones can cut dynamic and standby power by double-digit percentages at the same node. That margin matters most in the markets Ambiq serves.

Ambiq has built its business on that premise. The company's ultra-low-power SoCs target battery-operated devices — wearables, smart cards, IoT sensors, and hearables — where battery life, not peak performance, is the selling point. Its subthreshold and near-threshold circuit techniques extract operation from transistor regions most designers avoid. For Ambiq, foundation IP tuned to those techniques is not a commodity; it is a competitive moat.

For M31, the collaboration extends a straightforward strategy. The Taiwan-based IP supplier has spent years building foundation IP across TSMC's mainstream nodes, earning design-win-driven revenue each time a customer tapeout goes to production. A joint development with a marquee low-power customer such as Ambiq strengthens M31's position at N12e and signals the libraries are silicon-proven against real ultra-low-power requirements rather than generic specs.

The commercial logic runs both ways. Ambiq gains early access to N12e foundation IP shaped around its own circuit methodology, compressing the design cycle for its next product generation. M31 gains a reference customer whose end products ship in volume, converting the partnership into licensing and royalty streams as other N12e adopters follow.

Geopolitical and supply-chain context matters here only in one respect: demand for mature and specialty nodes keeps rising as automotive, industrial, and IoT customers exhaust 40nm and 28nm capacity, and foundries are re-pricing and re-investing across that range accordingly. A 12nm-class enhanced process with low-power IP readiness gives designers an option that balances wafer economics against performance headroom.

Details on the specific IP blocks, availability dates, and licensing terms remain undisclosed. Neither company has published revenue projections tied to the collaboration, and EE Times Asia's report does not include analyst estimates.

The partnership nonetheless signals where the volume action in low-power design is heading. As battery-operated edge devices multiply, expect further joint IP developments between specialty foundry processes and the designers who push their leakage and dynamic-power limits — with N12e foundation IP availability likely to influence near-term tapeout decisions at the 12nm-class node.

Source: Google News: TSMC

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Nathan Brooks

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Senior reporter covering industry trends and analytics at Chip Dispatch.

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