Nvidia Tells Suppliers to Tap TSMC Process for Next-Generation Memory Chips - The Information

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Nvidia Asks Suppliers to Use TSMC Process for Next-Gen Memory

Nvidia has told memory suppliers to use a TSMC process for next-generation memory chips, opening a second manufacturing path for the AI supply chain's scarcest component.

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Tom Whitfield
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Nvidia has told its memory suppliers to build next-generation memory chips on a TSMC process, according to a report by The Information. The instruction matters because it points production away from the established route and toward TSMC, the foundry that already makes Nvidia's AI processors.

Today, high-bandwidth memory (HBM) that sits next to Nvidia's AI accelerators comes almost entirely from the three Korean and Japanese memory makers — SK hynix, Samsung and Micron — using their own fab lines. A request to tap TSMC process technology would give the AI memory supply chain a second path, one controlled by the same foundry that fabricates the GPUs themselves.

What does the directive change?

Nvidia does not make memory. It buys HBM stacks from suppliers and packages them alongside its GPUs. Its leverage comes from scale: whoever wins Nvidia's orders supplies the memory for the industry's most demanded AI chips.

By naming TSMC as the process to tap, Nvidia effectively asks its memory partners to shift some next-generation production onto TSMC's wafers. That changes the commercial picture in two ways. First, it ties advanced memory capacity to TSMC's leading-edge fab network in Taiwan. Second, it gives memory makers a way to add supply outside their own capital budgets, which have been the constraint on HBM output for the past two years.

The move carries geopolitical weight. Concentrating both logic and memory production on TSMC would place more of the AI hardware stack on the island that already carries most of the world's advanced chipmaking. Buyers who worry about that concentration now have one more reason to watch Taiwan's capacity plans.

Why would Nvidia want a TSMC option?

The Information's report frames the instruction as preparation for next-generation memory. Three pressures explain the logic:

  • HBM demand from AI accelerator makers has run ahead of what memory makers can supply, and allocation has favored the largest buyers.
  • TSMC is already packaging advanced chips, so memory built on its processes could integrate more closely with GPU production.
  • A second manufacturing route would give Nvidia pricing and supply leverage against the incumbent memory trio.

None of this is confirmed as a committed capacity figure. The report describes a supplier directive, not a signed wafer agreement, so any capacity or revenue impact remains a roadmap question rather than a booked number.

Who wins and who watches?

For TSMC, the directive extends its reach from logic into memory, a market it has so far served only at the edges. For SK hynix, Samsung and Micron, it raises the prospect that a future HBM generation could be made, at least in part, on a competitor's process.

For Nvidia, the benefit is optionality. If next-generation memory can be produced on TSMC wafers, the supply of the scarcest component in AI systems becomes less dependent on three vendors' capex cycles.

The takeaway in plain words: Nvidia is trying to widen the door through which AI memory reaches it, and it wants the same foundry that builds its GPUs to help hold that door open.

Whether suppliers follow the directive, and how much next-generation memory volume actually lands on TSMC processes, will shape HBM supply and pricing for the next AI chip cycle.

Source: Google News: TSMC

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Tom Whitfield

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Staff writer covering companies, deals and strategy in Semiconductors, chip manufacturing, hardware, AI compute at Chip Dispatch.

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