Samsung and SK have joined the race to develop co-packaged optics (CPO), signaling that the center of gravity in AI semiconductor development is shifting from raw compute toward moving data at what industry players call "the speed of light."

The two Korean giants' entry into CPO reflects a structural change in how AI datacenters are built. As accelerator performance scales, the bottleneck is no longer only inside the chip. Moving data between GPUs, memory, and switches now constrains system throughput and power budgets. Optical interconnect — and in particular co-packaged optics, which places optical engines directly alongside the switching silicon in the same package — has emerged as the leading answer to that problem.

CPO replaces the pluggable optical transceivers that sit at the edge of switch boards today. By shortening the electrical path between the switch ASIC and the optical conversion stage, it cuts power consumption and signal loss at high data rates. That trade matters directly for AI cluster economics: every watt saved on interconnect is a watt available for compute, and every reduction in link latency widens the effective bandwidth of large-scale training and inference systems.

The technology has already drawn commitments from the major networking and foundry players, and Samsung's and SK's involvement now extends the field to Korea's two largest semiconductor groups. For Samsung, CPO sits at the intersection of several existing businesses: foundry advanced packaging, memory, and system-level integration through its semiconductor divisions. For SK — whose flagship SK Hynix memory operation supplies the HBM stacks that dominate AI accelerators today — optics represents a hedge on where value migrates if data movement, rather than memory bandwidth alone, becomes the defining constraint of next-generation AI hardware.

The strategic logic is straightforward. AI accelerators already consume memory at extraordinary rates, and the interconnect fabric that links thousands of those accelerators into a single training system has become a first-order design problem rather than an afterthought. If optical data transfer becomes the standard method of moving data at scale, the suppliers that control the optical-electronic interface — packaging, silicon photonics, laser sources, and the integration of all three — will capture a share of AI infrastructure spending that today flows largely to GPU and switch vendors.

Samsung and SK's participation also carries competitive weight beyond Korea. CPO supply chains are still forming, and no vendor has locked in a dominant position in the packaging and integration layer. Established logic foundries, networking silicon specialists, and now the Korean memory and foundry incumbents are all positioning for the same role. The entry of two of the world's largest semiconductor manufacturers into the race suggests they see a realistic path to volume production rather than a purely experimental bet.

Timing favors early movers. AI datacenter buildouts continue at pace, and switch generations are converging on data rates at which pluggable optics become increasingly power- and density-limited. Each new switch generation therefore represents a potential insertion point for CPO, and the vendors qualified into those platforms gain multi-year design positions.

For now, the shift from compute to data transfer remains a direction rather than a completed transition. Nvidia-class accelerators still command the bulk of AI silicon spending, and electrical interconnect still carries most of the traffic inside today's clusters. But the direction of travel is clear: as model scale forces larger and larger physical clusters, the cost of moving data — in watts, in latency, and in dollars — grows faster than the cost of computing it. Samsung and SK's entry into co-packaged optics signals that both companies expect that economics to define the next phase of AI hardware competition.