Samsung and SK hynix have joined the race to commercialize co-packaged optics (CPO), the technology that moves data between AI accelerators at the speed of light by integrating optical engines directly alongside compute silicon in the same package, Asia Economic Daily (아시아경제) reports.

The move signals that Korea's two largest memory and logic players now view optical interconnect as a competitive front in AI semiconductors, not a networking-sideafterthought. As AI clusters scale to tens of thousands of accelerators, the copper interconnects that today carry data between GPUs, HBM stacks and switch fabrics are emerging as a bottleneck in bandwidth, power and signal reach. CPO addresses that by replacing electrical links over the board with optical paths that terminate millimeters from the die.

The report frames the development as a shift in how AI chips compete: performance gains are no longer decided solely by transistor speed or memory bandwidth, but by how fast data moves through the system. Hence the framing that AI semiconductors now "compete at the speed of light."

Why CPO matters for AI accelerators

In conventional architectures, switch ASICs and accelerators exchange data through pluggable optical modules at the rack edge. Every electrical hop between die, package, board and module burns power and adds latency. Co-packaged optics shortens that path by placing the optical engine in the same package as the switching or compute die, cutting power per bit and opening headroom for higher aggregate bandwidth between GPUs.

For Samsung and SK, the stakes span both sides of their businesses. SK hynix supplies the majority of the world's HBM used in AI accelerators; if optical interconnect becomes standard in next-generation packages, the memory maker must ensure its stacks integrate with CPO architectures or risk losing sockets. Samsung, which builds custom AI logic through its foundry and packages advanced products through its assembly operations, sees CPO as a way to sell advanced packaging capacity that goes beyond traditional substrate-level integration.

A crowded field

The Korean pair enters a race already populated by established optics and networking players. Broadcom has shipped co-packaged optics switch platforms to hyperscale customers, and Intel has long pursued silicon photonics and optical interconnect research. Nvidia has discussed optical interconnect as part of the roadmap for scale-up AI clusters. Japanese and Taiwanese suppliers, meanwhile, dominate the components — silicon photonics foundries, optical engines and fiber attach — that any CPO product depends on.

That supply chain reality explains the urgency in Seoul. If CPO adoption accelerates with the next generation of AI accelerators and switch silicon, companies that control the packaging and optical integration step will capture value that today flows to conventional networking vendors. Samsung's advanced packaging operations and SK's memory integration capabilities give both a plausible entry point.

Commercial outlook

The report does not attach a timeline or production volume targets to either company's CPO effort, and neither Samsung nor SK has announced confirmed capacity commitments or customer deals for co-packaged products. What is confirmed is directional: both Korean chipmakers have publicly positioned optical interconnect as part of their AI semiconductor strategies as competition in the segment intensifies.

The competitive dynamic now hinges on whether CPO moves from switch silicon — where it is furthest along — into accelerator packages themselves, and how quickly hyperscalers demand it. If optical co-packaging becomes a requirement for the next AI accelerator generation, the winners will be the suppliers that can combine logic, memory and photonics in a single validated package. Samsung and SK's entry suggests both intend to be at that table rather than watching from outside.