Science Tokyo Builds 25 nm Ferroelectric Memory That Gains as It Shrinks
Researchers at Science Tokyo built a 25-nanometer ferroelectric memory unit that performs better as it scales down, using hafnium oxide already accepted in fab processes.
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A research team at Science Tokyo has built a ferroelectric memory cell just 25 nanometers across — roughly one three-thousandth the thickness of a human hair — and shown that it performs better, not worse, as it shrinks. The result upends a scaling assumption that has shaped memory design for decades, and it rests on a material, hafnium oxide, that semiconductor fabs already use.
Professor Yutaka Majima and his group at the Institute of Science Tokyo's Materials and Structures Laboratory developed the device. The concept behind it, the ferroelectric tunnel junction (FTJ), is not new. Researchers first proposed it in 1971 as a way to store data by switching a material's internal electric polarization, which in turn changes how easily current flows through it.
Why conventional scaling fights memory cells
Memory stores information as 0s and 1s by controlling how readily electricity passes through a material. As engineers shrink each cell, the energy cost of reading and writing has traditionally risen, and heat has grown with it. That dynamic is one reason smartphones heat up and drain batteries under load.
Ferroelectric memory promised a lower-power route, but traditional ferroelectric materials lost performance as devices scaled down. The technology stalled at larger geometries for four decades.
The 2011 discovery that hafnium oxide could hold its electric polarization even in extremely thin films changed the picture. Majima's team set out to push that property to an extreme: a cell measuring 25 nanometers.
How the team solved the leakage problem
At that scale, a new obstacle appears. Current leaks through the boundaries between the tiny crystals inside the material, and this leakage has long blocked further miniaturization. The team attacked the problem from an unexpected direction.
- They made the device even smaller, which reduced the influence of the crystal boundaries rather than increasing it.
- They heated the electrodes so each one naturally formed a semicircular shape.
- That geometry produced a structure closer to a single crystal, leaving fewer boundaries where current could leak.
The combination delivered high performance at 25 nanometers and produced the surprise finding: the memory actually improves as it gets smaller.
What changes for device makers?
The commercial significance lies less in the laboratory result than in the material. Hafnium oxide is already compatible with existing semiconductor manufacturing, so the path from lab to fab is shorter than it would be for an exotic material. If the technology reaches production, the researchers say smartwatches could run for months per charge and sensor networks could operate without frequent battery swaps.
For AI workloads, the same memory could support faster processing at far lower energy draw. The team frames the achievement as a proof that questioning standard assumptions can open entirely new directions.
Majima said: "Challenging what seem to be the limits of science — such as 'we cannot make things any smaller' or 'they will break if we do' — is like walking in the dark. It is a continuous struggle. However, by questioning traditional assumptions and exploring new ways to overcome these barriers, we were able to discover an entirely new perspective. I would be delighted if this achievement sparks the curiosity of young people who will shape the future and helps build a better world."
The finding does not put a production part on anyone's roadmap yet. It establishes that ferroelectric scaling can reverse, rather than merely resist, the usual penalty of miniaturization. How quickly memory vendors move hafnium oxide FTJs from a 25-nanometer lab demonstration toward qualified production will determine whether wearables, sensors, and AI accelerators see the energy gains the researchers project.
Original: isct.ac.jp
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Staff writer covering companies, deals and strategy in Semiconductors, chip manufacturing, hardware, AI compute at Chip Dispatch.
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