SK hynix Deepens AI Memory Collaboration with TSMC, Extending Roadmap from HBM4 to HBM5 - Korea IT Times

Memory & Storage

SK hynix Wins Second Straight TSMC Partner of the Year Award

SK hynix secured its second consecutive TSMC Partner of the Year award following HBM5 validation work with CoWoS packaging, the company confirmed at the Sept. 23 Open Innovation Platform Forum in Santa Clara, California.

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SK hynix captured TSMC's Partner of the Year award for the second consecutive year in the "3DFabric-HBM Integration" category, the memory maker confirmed following the TSMC Open Innovation Platform Forum held in Santa Clara, California on Sept. 23.

The award followed collaborative validation of next-generation HBM5 memory using TSMC's CoWoS advanced packaging technology, according to SK hynix's post-event statement. The company did not disclose validation timelines, qualification milestones, or HBM5 volume targets.

What did SK hynix bring to the forum?

SK hynix presented its AI memory portfolio under the theme "The Memory behind the Intelligence at Scale." The company has attended TSMC's OIP event every year since 2024.

The showcase spanned HBM, SOCAMM2, server DRAM, and enterprise SSDs. SK hynix named NVIDIA as a co-display partner but did not identify other foundry or hyperscaler customers for the exhibited parts, a silence that leaves commercial intent open to interpretation.

Which products anchor NVIDIA's Vera Rubin platform?

A 36GB 12-layer HBM4 sample and a 96GB SOCAMM2 module sat alongside NVIDIA's next-generation Vera Rubin reference design, according to SK hynix's Santa Clara presentation. The company did not specify which HBM4 stack revision ships first into Rubin.

The broader HBM lineup on the booth included four additional devices:

  • 48GB 12-layer HBM4E
  • 48GB 16-layer HBM4
  • 36GB 12-layer HBM3E
  • 192GB SOCAMM2

The 16-layer HBM4 carries four extra dies per stack over the 12-layer variant, which translates into a meaningful per-package bandwidth margin if it qualifies at volume.

How is the portfolio expanding beyond HBM?

SK hynix built out a server DRAM family on its sixth-generation 10nm-class, or 1c, process node. The roster included:

  • 256GB 3DS RDIMM
  • 128GB MRDIMM
  • 64GB RDIMM

For enterprise storage, the company highlighted the PEB210 E1.S with liquid-cooling support and the PS1101 E3.S, a QLC-based enterprise SSD. Neither device carries a public price, formal ship date, or named qualified buyer today, which leaves revenue timing deliberately vague.

Why does advanced packaging matter here?

As HBM bandwidth rises, the bottleneck shifts from die-level performance to interposer-level integration. CoWoS capacity has acted as the binding constraint on AI accelerator output through the 2024 and 2025 supply cycles, according to multiple supply-chain accounts in the trade press.

Validation of HBM5 on CoWoS is therefore the next commercial gate for both companies. SK hynix did not specify which CoWoS variant — the current-generation process or its planned successors — supports the HBM5 qualification work, and TSMC declined to comment on the record.

Where does this leave the HBM competitive picture?

SK hynix competes with Samsung Electronics and Micron Technology in the HBM segment. All three suppliers have shipped or sampled HBM3E to NVIDIA, but HBM4 qualification timelines and customer-level allocations remain undisclosed across the trio.

The Partner of the Year award carries branding value for both sides of the partnership. It does not by itself confirm HBM5 volume, pricing, or wafer allocation between TSMC's CoWoS lines — questions that will likely return in Q4 earnings calls.

What comes next?

SK hynix frames the expanded portfolio as the foundation for the next phase of AI infrastructure build-outs. That framing assumes sustained AI server demand and steady CoWoS throughput from TSMC, two assumptions that are not guaranteed into 2026.

The next commercial checkpoint is NVIDIA's Vera Rubin launch. SK hynix declined to confirm shipment dates, pricing, or volume for any HBM4, SOCAMM2, or HBM5 part into that platform, leaving the actual ramp date without a public anchor.

Original: koreaittimes.com

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News editor covering money, funding and market shifts around Semiconductors, chip manufacturing, hardware, AI compute at Chip Dispatch.

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