
TSMC Plans Five More Advanced Packaging Plants in Taiwan
TSMC plans five more packaging plants in Taiwan, Businesskorea reports, extending a CoWoS buildout that has become the pacing constraint for AI accelerator shipments.
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TSMC plans to build five additional packaging plants in Taiwan, Businesskorea reports, doubling down on advanced packaging capacity as AI accelerator demand continues to outstrip supply.
The plan signals where TSMC now sees its next structural constraint. For two years, advanced packaging — not front-end wafer capacity — has been the binding limit on shipments of AI accelerators built on TSMC's leading-edge nodes. NVIDIA's Hopper and Blackwell-class GPUs, AMD's Instinct MI300 series, and Google's and AWS's custom AI silicon all route through TSMC's CoWoS and InFO family of packaging technologies, which stack logic dies and high-bandwidth memory on silicon interposers or organic substrates.
TSMC has not yet disclosed investment figures, timelines, locations, or capacity targets for the five planned plants, according to the report. The company has been racing to expand CoWoS output across multiple sites in Taiwan, including Chiayi, which the company designated last year as a hub for advanced packaging and testing. The reported plan for five more facilities suggests TSMC expects AI-driven demand for chip-on-wafer-on-substrate capacity to remain supply-constrained well beyond the current expansion cycle.
Taiwan's government has encouraged the buildout. Advanced packaging projects qualify for subsidies under Taiwan's program to support leading-edge semiconductor investment on the island, and local governments have competed to host the facilities — Chiayi won TSMC's packaging campus in part by offering land more quickly than rival bidders.
The expansion also carries competitive weight. Intel is pushing its own packaging roadmap as a foundry differentiator, and Samsung Electronics has told investors that advanced packaging is central to its foundry turnaround strategy. Both rivals are courting the same AI customers that currently have no practical alternative to TSMC for high-volume 2.5D packaging of large accelerators. If TSMC locks in five more plants while rivals remain at pilot scale, the packaging gap could widen even as Intel and Samsung close the transistor-level gap at advanced nodes.
For chip buyers, the question is throughput timing. Analysts have repeatedly flagged CoWoS capacity as the pacing item for AI GPU shipments; capacity that comes online in 2026 and beyond will determine whether accelerating demand from hyperscalers gets served or stays queued. TSMC has not yet committed to dates for the five new plants, and the pace of permitting, equipment delivery, and customer prepayments will shape how quickly that capacity converts into shipments.
Businesskorea's report indicates the facilities are additions to TSMC's existing and announced packaging sites in Taiwan rather than overseas, reinforcing the company's strategy of keeping its most advanced back-end capability on home ground even as it builds front-end fabs in Arizona, Japan, and Germany.
Source: Google News: TSMC
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Senior reporter covering industry trends and analytics at Chip Dispatch.
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