GlobalFoundries has reportedly agreed to a $2 billion contract with TSMC to build the first US-based interposer supply line for AI chips, according to Tech Times.

The pact, if confirmed at the reported scale, would relocate a TSMC-dominated segment of advanced packaging — the silicon interposers that sit between stacked chiplets and the package substrate — onto American soil. Interposers are the binding constraint in 2.5D flows such as TSMC's CoWoS (Chip-on-Wafer-on-Substrate) process, used inside NVIDIA's H100, H200 and Blackwell AI accelerators.

What is at stake for the AI supply chain?

CoWoS demand has run ahead of TSMC's capacity for more than a year, holding back accelerator shipments and pushing hyperscaler buyers into multi-year capacity reservations. A qualified second source inside the United States shifts both pricing leverage and geopolitical exposure.

The $2 billion headline figure matches analyst ranges for greenfield 300mm interposer capacity at AI volumes, though Tech Times did not disclose whether the number represents a multi-year revenue stream, an upfront capacity reservation, or a combined total.

Why GlobalFoundries, and where?

GlobalFoundries already operates a 300mm line at its Malta, New York site running 12nm finFET and 22FDX; an adjacent 12-inch module is the most plausible location for a new interposer line. The company also holds the legacy IBM fabs at Essex Junction, Vermont and East Fishkill, New York, both already qualified for US government and defense customers.

In recent years, GlobalFoundries has steadily broadened its back-end toolset through acquisition and qualification work. Interposers are a step up from the wafer-bump and redistribution services it already sells, moving it deeper into front-end silicon where margins and capacity scarcity are both higher.

How does it map onto US industrial policy?

The contract dovetails with a $1.5 billion preliminary memorandum GlobalFoundries signed with the US Department of Commerce in February 2024 to expand Malta and Vermont. A TSMC-funded interposer line would slot directly into that funded footprint and count toward Washington's CHIPS and Science Act push to onshore advanced packaging.

For TSMC, qualifying an existing US fab shortens a capacity ramp that would otherwise run 18 to 24 months for additional Taiwan-based interposer modules. It also gives TSMC's AI customers a hedging option if cross-strait tensions escalate.

What remains unverified

Tech Times did not publish wafer-per-month capacity, tape-out timing, or contract length. Neither TSMC nor GlobalFoundries confirmed the deal beyond acknowledging the story, the report said.

Until those numbers emerge, the $2 billion figure reads as a directional marker rather than a settled order book. If production ramps at the implied scale, the next 12 to 18 months will determine whether the United States can credibly host a second source for the silicon interconnection layer inside every leading AI accelerator shipping today.