Samsung will use TSMC's 3nm process for the base die of high-bandwidth memory for the first time, according to a BigGo Finance report. The decision follows pressure from NVIDIA, which has imposed a unified specification on its HBM suppliers. Samsung has not confirmed the arrangement publicly.

The shift breaks a long-standing pattern. Samsung has historically kept HBM base die production inside its own foundry network, pairing its memory stacks with its own logic wafers. That vertical integration was a point of pride and a cost lever. It is now a liability, because NVIDIA wants interchangeable parts from every qualified vendor.

What does NVIDIA's unified spec actually demand?

NVIDIA sources HBM from multiple suppliers for the same accelerator generations. A unified specification means the base die — the logic layer that sits beneath the DRAM stacks and handles signal distribution — must meet identical performance and interface requirements regardless of who builds it. SK hynix, Samsung's chief rival in HBM, already works with TSMC on advanced base die and logic wafer production for high-end stacks.

The report frames Samsung's move as a concession rather than a choice. NVIDIA holds the buying power. Samsung wants volume orders for next-generation AI accelerators. Meeting the spec at the required node meant qualifying TSMC's 3nm family rather than relying on its own yield-challenged gate-all-around lines.

That last point deserves scrutiny. Samsung's 3nm yield record remains the industry's worst-kept secret. The company has never published yield figures for its SF3 node family. If its own 3nm were competitive, the unified-spec argument alone might not have forced this outcome. The report does not say what TSMC process variant Samsung will use, or in what volume.

Why the base die matters

The base die is not passive silicon. In current-generation HBM3E and the coming HBM4 class, it carries substantial logic:

• Physical layer interfaces for the host SoC
• Command and address routing across the DRAM tiers
• In HBM4 designs, vendors plan custom logic functions on the base die itself

HBM4 moves the base die closer to a foundry product than a memory product. This is precisely why the foundry choice matters to NVIDIA. A weak base die caps stack bandwidth no matter how good the DRAM is.

TSMC's 3nm family, N3E and its derivatives, already carries Apple, Qualcomm and MediaTek flagship silicon. Adding Samsung as a logic customer — even for memory-adjacent wafers — extends TSMC's reach into a segment Samsung regarded as its own.

What is confirmed and what is not

The report's confirmed core: Samsung has placed base die work with TSMC at 3nm, for the first time, under NVIDIA's unified specification regime.

What the report does not establish:

• Which HBM generation the TSMC-built base die targets, though HBM4 timing makes it the plausible candidate
• Volumes, wafer starts, or revenue split between the two foundries
• Whether Samsung's own foundry keeps any share of the base die business
• Whether SK hynix's existing TSMC relationship set the technical benchmark Samsung had to match

Each of those gaps matters commercially. Without volumes, one cannot size the revenue Samsung foundry just lost or TSMC just gained.

Competitive read

For TSMC, the win is incremental revenue and a symbolic one: the last major holdout among memory makers now buys its logic wafers in Hsinchu. For Samsung foundry, it is an admission that leading-edge memory packaging no longer guarantees leading-edge logic demand. For Samsung's memory division, it is pragmatism — NVIDIA orders outweigh foundry pride.

For SK hynix, the change levels a technical playing field it briefly led alone. NVIDIA, meanwhile, gets a deeper qualified supply pool and interchangeable suppliers at the most capacity-constrained layer of the AI memory stack.

Samsung's next disclosure cycle, and any TSMC customer-list movement, will show whether this is a one-off qualification or the start of a standing split in HBM base die supply.