
Samsung Turns to TSMC 3nm for Nvidia Custom HBM Base Die
Samsung Electronics will use TSMC's 3nm process for the base die of a custom HBM product built for Nvidia, putting Samsung memory silicon on its foundry rival's line.
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- Grace Kim
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Samsung Electronics has placed production of the custom HBM base die for Nvidia with TSMC, using the foundry's 3nm process, according to a report from BigGo Finance. The decision puts one of Samsung's highest-profile memory products on silicon fabricated by its most direct competitor.
The base die sits at the bottom of a high-bandwidth memory stack. It carries the logic layer that connects the DRAM dies above it to the compute chip through an interposer. As HBM generations advance, this die has shifted from simple routing logic toward capacity-augmenting compute functions, which pushes it onto leading-edge process nodes.
That shift explains the sourcing logic. Memory manufacturers do not run logic processes at the leading edge themselves. Samsung Foundry does offer advanced nodes, but the report indicates Nvidia selected TSMC's 3nm technology for the base die of this custom HBM product. TSMC is the merchant foundry with the deepest record at 3nm-class volume production.
What does this mean for Samsung's memory business?
For Samsung's memory division, the arrangement is less paradoxical than it appears. The unit sells HBM stacks, not wafers. If the customer specifies a TSMC-fabricated logic die, Samsung's commercial interest lies in supplying the DRAM dies and the integrated stack. The memory business and Samsung Foundry operate as separate units with separate P&L accounts, and memory customers routinely dictate supplier choices for components inside packaged products.
The arrangement still carries a competitive sting. Samsung Foundry has competed for the same advanced logic orders that TSMC now holds, and a Samsung-affiliated product landing at TSMC signals where a major customer places its confidence for leading-edge logic. It also deepens Nvidia's already heavy concentration on TSMC for advanced silicon.
Why does the base die matter at 3nm?
The logic die beneath an HBM stack determines bandwidth, power delivery and, increasingly, added memory capacity through near-memory processing functions. Finer process geometry shrinks the die area for that logic, reduces its power draw and raises the stack's aggregate performance. For a custom HBM variant built around a specific accelerator, the base die is effectively a co-designed chip, not a commodity component.
Nvidia's data center accelerators depend on HBM for nearly all their memory bandwidth. Custom HBM products, tuned to a single customer's workloads, tighten that dependency further, which makes the process choice for the logic layer a strategic decision rather than a procurement detail.
How does this fit the wider supply picture?
The report places Nvidia's custom HBM program at the intersection of two supply chains. Samsung supplies stacked DRAM and packaging integration. TSMC supplies the leading-edge logic die. No single vendor currently delivers the complete, most advanced HBM stack from DRAM fabrication through leading-edge logic, so splits of this kind are becoming the default structure of the market.
The arrangement mirrors how the industry handled earlier HBM generations, when logic dies moved to progressively finer nodes at merchant foundries while memory makers focused on stacking yield. What has changed is the node: base-die logic has now reached the 3nm class, the same generation used for flagship mobile and compute processors.
BigGo Finance did not disclose deal value, volume targets, a production start date or the specific HBM generation involved. The report also did not state whether Samsung Foundry bid for the work or whether other custom HBM customers will follow the same sourcing pattern. Those details will determine how much foundry revenue Nvidia's custom memory program generates for TSMC and how Samsung balances its internal memory and foundry interests going forward.
Source: Google News: TSMC
More from Grace Kim
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Market editor covering people, launches and day-to-day practice in Semiconductors, chip manufacturing, hardware, AI compute at Chip Dispatch.
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