Hardware & Components

The Smart Netlist: SpeedUp Reimagines the PCB Handoff

SpeedUp has developed a prompt-to-KiCad workflow that turns product requirements into structured KiCad schematic projects and passes an enriched handoff to PCB layout, redefining the boundary between logical and physical design.

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Nathan Brooks
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SpeedUp has developed a prompt-to-KiCad workflow that turns product requirements into structured KiCad schematic projects and passes an enriched handoff to PCB layout. The company's electronics engineer Ruiwen Dong argues the work should be reorganized, not just accelerated.

"The deeper opportunity is not to ask AI to imitate an engineer drawing one schematic page at a time," Dong writes. "It is to reorganize hardware development from a serial chain of specialists and documents into a requirements-driven system where several focused agents can work in parallel."

What does the smart netlist actually carry?

A traditional netlist records which pin connects to which. SpeedUp's enriched package, which the source article calls a "smart netlist," extends that record with engineering context.

The package typically includes:

  • Routing priority and signal type, including differential pairs and sensitive nets
  • Length-matching or impedance requirements
  • Current levels for power paths and the resulting copper needs
  • Functional grouping and placement suggestions
  • Assumptions that must be confirmed before physical design is released

The format is not a new file standard. It is a linked handoff whose data stays attached to the relevant components, nets, and functional modules. A PCB tool receiving it begins from part of the reasoning that produced the connections.

How does the parallel workflow run?

The starting point is a set of natural-language or formal requirements converted into a system-level model. The model identifies functional blocks, interfaces, voltage domains, power budgets, and timing assumptions.

After an engineer approves the system boundaries, four agent types proceed at once:

  • A topology agent defines major blocks and their relationships
  • A component-selection agent evaluates electrical fit, package constraints, availability, price, and lifecycle information
  • Circuit agents design individual modules, perform calculations, and check local assumptions
  • A documentation agent converts approved connections into consistent schematic pages

The agents coordinate through the approved system model. An interface between two modules must show the same voltage, protocol, and timing assumptions on both sides. A part change that shifts the power budget becomes visible to the affected modules.

SpeedUp tested the method against two reference designs. The first is a low-power temperature-and-humidity sensor node with a microcontroller, sensor, battery, power conversion, and debug interface. The second is a small wireless controller with a microcontroller, USB interface, power conversion, memory, and an antenna. In both cases, the layout engineer kept final placement authority but started from a more complete package.

What does this change for the engineer?

The shift moves the engineer from document carrier to technical director. Architectural decisions, calculation review, component approval, and conflict resolution remain human work. Repetitive translation between schematic and layout tools does not.

Dong frames the role change with a single comparison. The traditional engineer lays every section of railway by hand. The new engineer plans the network and directs several construction crews working from the same map. The work proceeds in parallel, but the engineer remains responsible for the map, the interfaces, and the final technical decisions.

What happens next?

The open question is whether commercial EDA vendors will adopt similar shared-system models or keep the netlist inside their own toolchains. KiCad is the open-source reference, but the workflow principle applies to any schematic and layout suite.

"The netlist evolves from a list of connections into a carrier of shared engineering intent," Dong writes. "Once that intent is explicit and reviewable, AI can do more than draw faster. It helps hardware teams coordinate work that previously had to proceed one stage at a time."

If the smart-netlist approach gains traction, the schematic-to-PCB boundary will look less like a handoff and more like a shared data layer that several specialists, human and artificial, work against at the same time.

Source: Electronic Design

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Nathan Brooks

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Senior reporter covering people, launches and day-to-day practice in Semiconductors, chip manufacturing, hardware, AI compute at Chip Dispatch.

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