TSMC CoWoS Prices May Rise Up to 20% as Capacity Tightens

Taiwan Semiconductor Manufacturing Company (TSMC) reportedly plans to raise advanced-packaging prices by as much as 20% as AI-chip demand collides with constrained CoWoS capacity and longer semiconductor-equipment lead times.

Cailian Press reported the proposal on Oct. 27, citing unnamed media reports and industry sources; the source provides no detailed company announcement.

What is driving the price increases?

Foundries and outsourced semiconductor assembly and test (OSAT) providers, besides TSMC, are preparing another round of CoWoS quote increases of 10% to 20%, according to the same report. High-end AI processors use CoWoS widely, and demand has expanded from graphics processing units into server central processing units and custom application-specific integrated circuits.

Longer AI-chip test cycles add pressure to the packaging-and-test supply side, where capacity has become scarce. The report also links cost increases across the broader semiconductor supply chain to AI infrastructure spending and manufacturers’ rush to fulfill orders.

Equipment lead times now make that imbalance harder to resolve. Lead times for chip-manufacturing equipment have stretched from 3 to 6 months previously to 6 to 8 months, as chipmakers scramble to reserve production schedules and equipment suppliers struggle to ramp capacity.

Industry insiders described customers with little room to negotiate: “as long as they can guarantee delivery dates, they place orders,” one insider said. That urgency gives suppliers more room to pursue the reported increases, although the source provides no effective date or company-by-company schedule.

How much capacity is coming?

Analysts cited by the report estimate that TSMC’s monthly CoWoS production capacity could exceed 130,000 wafers by 2026 and increase to 200,000 wafers by 2027. Those numbers are analyst estimates, not confirmed output or shipment guidance.

The estimate nevertheless points to a substantial capacity response, measured in tens of thousands of wafers per month. It does not show when the added supply will close the present gap, how much of it will serve GPUs versus server CPUs or ASICs, or what pricing relief customers may receive.

CoWoS pricing will therefore depend on the balance between that ramp and demand across those processor categories, plus the longer testing and equipment cycles that constrain effective output.

What did C. C. Wei say?

At the most recent investor conference, TSMC Chairman C. C. Wei said: “At this stage, CoWoS remains the customers’ top choice.”

He added that rival solutions remained competitive, but TSMC had become the only manufacturer to achieve mass production at five-times mask size, which he said left its competitiveness beyond question. TSMC now runs five-times mask-size packaging in mass production with excellent yields, Wei said, though he gave no yield percentage.

Taiwan Semiconductor is developing nine-times and fourteen-times mask-size solutions while advancing CoPoS technology for future larger-size packages and lower costs. The source provides no schedule for the larger packages, no CoPoS launch date and no quantified savings, so those developments remain roadmap statements rather than committed commercial output.

What do equipment orders show?

Upstream equipment suppliers said TSMC’s annual procurement behavior has changed. In previous years, the company typically asked suppliers to lower prices or, when prices stayed unchanged, add features to the tools.

This year, TSMC ordered at the original prices without renegotiating and kept equipment specifications and functions unchanged, according to those suppliers. They described the shift as indirect evidence of robust current market demand; it does not reveal order values, tool quantities or delivery commitments.

Longer tool lead times still limit how quickly packaging capacity can come online, even with firm orders. The combination of 6-to-8-month equipment waits, longer AI-chip testing and constrained packaging lines could keep usable output below the estimated monthly wafer capacity as demand broadens.

Where could pricing go next?

The key variables are whether the reported 10% to 20% CoWoS increases take effect, how quickly TSMC approaches the analysts’ estimate of more than 130,000 wafers per month in 2026, and whether test-cycle and tool constraints ease before the 200,000-wafer 2027 estimate. Until then, delivery certainty should remain more valuable than price, and suppliers able to reserve capacity should retain leverage in a market where customers place orders once delivery dates are guaranteed.