A prototype power-conversion chip from UC San Diego has stepped 48 volts down to 4.8 volts at a peak efficiency of 96.2 percent — while delivering roughly four times more output current than earlier piezoelectric-based designs. The result, published in Nature Communications on April 10, 2026, takes direct aim at one of the data center industry's stubborn bottlenecks: getting rack-level 48-volt distribution down to the 1-to-5-volt rails that GPUs actually run on.

The paper's senior author is Patrick Mercier, a professor in the Department of Electrical and Computer Engineering at the UC San Diego Jacobs School of Engineering. First author Jae-Young Ko is an electrical and computer engineering Ph.D. student at UC San Diego; Wen-Chin B. Liu co-authored the work.

Why does GPU power delivery need rethinking?

Every electronic device relies on DC-DC step-down converters to bridge the gap between power sources and sensitive silicon. The job sounds mundane. In data centers it has become genuinely hard.

Racks distribute electricity at 48 volts. GPU processors typically require between 1 and 5 volts. As computing systems grow more powerful and more compact, efficiently managing that large voltage drop gets tougher — and conventional designs are running out of headroom.

Most existing converters rely on magnetic components such as inductors. Decades of refinement have squeezed them nearly dry.

"We've gotten so good at designing inductive converters that there's not really much room left to improve them to meet future needs," Mercier said.

What makes the piezoelectric approach different?

Mercier's team built instead on piezoelectric resonators — small devices that store and transfer energy through mechanical vibration rather than magnetic fields. In principle, converters built this way can be smaller, more energy dense, more efficient, and easier to manufacture at scale.

"They have a lot of room to grow and have the potential to deliver better performance than anything that's come before them," Mercier said.

The catch: earlier piezoelectric converters lost efficiency and delivered too little current when asked to handle large voltage differences. Exactly the regime data centers operate in.

How did the hybrid design break the limit?

The researchers paired a piezoelectric resonator with small, commercially available capacitors arranged in a carefully designed configuration. This hybrid setup creates multiple pathways for energy to move through the system. That reduces wasted power, lessens the strain on the resonator, and boosts power delivery — all while only slightly increasing the chip's size.

In lab testing under conditions similar to those found in modern data centers, the prototype converted 48 volts to 4.8 volts, a level commonly required in data centers, at 96.2 percent peak efficiency. Output current ran roughly four times higher than previous piezoelectric-based designs.

When could this reach real hardware?

Not soon, and Mercier is candid about it. Piezoelectric resonators physically vibrate, which means standard soldering cannot attach them to circuit boards. New integration strategies will be needed.

"Piezoelectric-based converters aren't quite ready to replace existing power converter technologies yet," Mercier said. "But they offer a trajectory for improvement. We need to continue to improve on multiple areas — materials, circuits and packaging — to make this technology ready for data center applications."

Next steps for the team include refining materials, improving circuit designs, and developing better packaging methods.

The project drew support in part from the Power Management Integration Center (PMIC), an Industry-University Cooperative Research Center funded by the National Science Foundation under award number 2052809.

For now, the 96.2 percent figure is a lab result, not a product spec. But if the materials and packaging problems fall, a technology with room to grow could start displacing inductors that have nowhere left to go.