AMD held 46 percent of x86 server CPU revenue in early 2026, up from roughly zero percent in 2015, when the company committed to re-enter the segment it had abandoned after the Opteron era.

Chief Executive Lisa Su laid out the roadmaps behind that share at last week's Advancing AI 2026 event in Silicon Valley. The agenda covered the forthcoming "Venice" Epyc 9006 server CPUs, the "MI455X" Instinct accelerators, and the "Helios" rackscale platform that ties them together.

What does the Venice Epyc 9006 lineup include?

The Venice family uses TSMC's N2 process for compute dies and a 6nm process for the I/O and memory controller tiles that link them. Su said the top Zen 6c variant will deliver 1.8x the performance per socket of the current "Turin" Epyc 9005 on the SPEC integer 2006 benchmark.

That Zen 6c part carries 256 cores and 512 threads across eight compute complex dies with 32 cores each. It supports 1.6 TB/sec of aggregate memory bandwidth on the SP7 socket, which holds 16 memory controllers running 12.8 GHz MRDIMMs or 8 GHz RDIMMs.

The standard Zen 6 part has 128 cores and targets the smaller SP8 socket with eight memory channels. Su said AMD focused on faster DDR5 rather than DDR6 to avoid early yield and cost penalties, and the company wants agentic AI sandboxes to see the highest performance per rack, per watt, and per dollar, "bar none."

A third variant, Venice HF, places only 12 Zen 6 cores per chiplet so AMD can push clock speeds to 5 GHz for high single-thread performance. A fourth, Venice-X, adds 3D vertical cache for cache-sensitive HPC and AI workloads.

The takeaway: Venice widens AMD's lead over Intel in core count and memory bandwidth while pricing leverage against Nvidia's "Vera" CPUs will hinge on average selling prices Su has not yet disclosed.

How does the MI455X compare to Nvidia's Rubin?

The MI455X is rated at 20 petaflops at FP8 and 40 petaflops at FP4 precision on the CDNA 5 architecture. AMD packed 432 GB of HBM4 across a dozen memory controllers for 23.3 TB/sec of aggregate bandwidth, exceeding Nvidia's upcoming Vera GPU in capacity by 50 percent and bandwidth by 6 percent.

The MI455X die combines compute and I/O chiplets using a mix of TSMC N2 and N3 processes, with compute tiles always on the smaller node because SerDes circuits do not shrink as cleanly as cores. The combined compute and I/O complex holds 320 billion transistors.

For HPC workloads, the MI430X variant delivers 288 teraflops at FP64 precision. AMD says that figure is 8.7x the FP64 throughput Nvidia plans for its "Rubin" GR200 GPU.

Nvidia achieves that rate through Ozaki emulation of FP64 on lower-precision hardware. The MI430X ships in the first half of 2027, giving Vera a brief window of exclusivity for buyers able to secure allocations.

The takeaway: AMD's MI400 series closes the memory and FP64 gap with Nvidia, but Nvidia retains a delivery advantage on Vera through 2026.

What does the Helios rackscale system deliver?

The first Helios rack pairs 18 Venice HF CPUs with 72 MI455X GPUs in a double-wide chassis, yielding 4,600 CPU cores and 18,000 GPU compute complexes. Pensando's "Salina" DPU handles storage and networking virtualization, and customers can choose between Broadcom's "Thor Ultra" or Pensando's "Vulcano" 800 Gb/sec AI NICs.

Su said the Helios rack would offer up to 30 percent more tokens per dollar than Nvidia's Vera-Rubin NVL72 system. On the Kimi K2 Thinking model from Moonshot AI, she reported 15 percent better tokens per second per GPU at low interactivity, 12 percent at medium, and 10 percent at high.

AMD plans an annual cadence for Helios that matches the Instinct GPU refresh. The Helios 500 series will add optical links alongside copper, and the 600 series could move to all-optical interconnect by 2028. AMD has not disclosed whether the MI600 will land in the same year.

The takeaway: AMD has assembled a credible roadmap that competes with Nvidia on feeds and speeds, and the next test will be whether hyperscalers and HPC buyers commit to multi-quarter purchase agreements once Venice and Helios ship this fall.